Viterbi Decoder of QPSK Digital Satellite Receiver

Error detection and correction system used in satellite links, magnetic recording, cell phones, compact disc players, wireline modems, terrestrial microwave links, and virtually anywhere that errors can be introduced by an imperfect channel is presented using the known Viterbi algorithm for maximum likelihood decoding. The proposed architecture is in a VLSI (or simply in an IC) form, which cab be easily implemented on a microelectronics chip as a stand alone IC or can even be included in a higher design as an intellectual property (IP). This design used AMS CYB 0.8-micron library and tools used are Mentor Graphics’. It’s believed that the Viterbi algorithm for error detection and correction is the best algorithm for maximum likelihood decoding. The decoder is fully digital which means that it can be either implemented on an FPGA or ASIC.